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@CHIP-RTOS C Library V2.06 - Hardware API


pfe_enable_adr

The IPC@CHIP® has non-multiplexed address bit outputs, e.g. A0 on SC1x or A23 on SC1x3. The enabling of one of these pins is done here.

void pfe_enable_adr ( unsigned char adr );

SC1x Parameters

adr
0: Enables A0
1: Enables A1
2: Enables A2

SC1x3 Parameters

adr
23: Enables A23

Return Value

-- none --.

SC1x Comments

Used pins:
    A[0..2], AD[0..7], RD#, WR#
Excluded pins:
    If A0 is enabled then PCS1#, TMRIN0, PIO4 are not available
    If A1 is enabled then PCS[5..6]#, TMRIN1, TMROUT1, PIO3 are not available
    If A2 is enabled then PCS[5..6]#, PIO2 are not available.

SC1x3 Comments

Used pins:
    A23
Excluded pins:
    If A23 is enabled then PIO26 is not available

RTOS API

This library function invokes a RTOS software interrupt. Refer to this RTOS API function's documentation for more details.

Supported since or modified in @CHIP-RTOS version

    SC12SC13SC11SC1x3
    V1.00V1.00V1.00V0.90

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