@CHIP-RTOS C Library V2.06 - Hardware API
pfe_set_edge_level_intr_mode
Set edge/level interrupt mode for INTx. void pfe_set_edge_level_intr_mode ( unsigned char mode,
unsigned short mask ); Parameters
mode
- 1 = active high, level-sensitive interrupt
0 = low-to-high, edge-triggered interrupt
SC1x Parameters
- mask
- Bits set to designate interrupts affected:
Bit 0 = INT0
Bit 1 = don't care
Bit 2 = INT2
Bit 3 = INT3
Bit 4 = INT4
Bit 5..15 = don't care
SC1x3 Parameters
- mask
- Bits set to designate interrupts affected:
Bit 0 = don't care
Bit 1 = INT1
Bit 2 = don't care
Bit 3 = INT3
Bit 4 = don't care
Bit 5 = INT5
Bit 6..15 = don't care
Return Value
- -- none --.
SC1x Comments- Default for all interrupts is edge-triggered mode.
In each case (edge or level) the interrupt pins must remain high
until they are acknowledged.
Level-sensitive mode for INT5 / INT6 is not supported. The INT5 / INT6
interrupts operate only in edge-triggered mode.
SC1x3 Comments- Default for INT3 interrupt is level-triggered mode.
Default for INT1 and INT5 interrupts is edge-triggered mode.
In each case (edge or level) the interrupt pins must remain high
until they are acknowledged.
Edge-sensitive mode for INT3 is not allowed if the USB controller is used,
because the INT3 interrupt is shared with the USB interrupt.
See Also
RTOS API
- This library function invokes a RTOS software interrupt.
Refer to this RTOS API function's
documentation
for more details.
Supported since or modified in @CHIP-RTOS version-
SC12 | SC13 | SC11 | SC1x3 |
-
V1.00 | V1.00 | V1.00 | V0.90 |
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